NTA-NET (Based on NTA-UGC) Electronic Science (Paper-II): Questions 100 - 101 of 124

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Question number: 100

» Solid State Device and Fabrication » Lithography

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Appeared in Year: 2018

Assertion-Reason▾

Question

Assertion (Ꭺ)

For integrated circuit production, the line width limit of optical Lithography lies near , although feature may eventually be printed under carefully controlled conditions. (July)

Reason (Ꭱ)

A negative resist on exposure to light becomes less soluble in a developer solution, while a positive resist becomes more soluble.

Choices

Choice (4) Response

a.

Both Ꭺ and Ꭱ are true but Ꭱ is NOT the correct explanation of Ꭺ

b.

Ꭺ is true but Ꭱ is false

c.

Both Ꭺ and Ꭱ are false

d.

Both Ꭺ and Ꭱ are true and Ꭱ is the correct explanation of Ꭺ

Question number: 101

» Digital Electronics » Gates

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Appeared in Year: 2018

Match List-Ⅰ List-Ⅱ▾

Question

Match the following lists: (July)

List-Ⅰ (Column-I) List-Ⅱ (Column-II)

(A)

Image of Circuit Lamp (L Choice-2)

Image of Circuit Lamp (L Choice-2)

Image of Circuit Lamp (L Choice-2)

(i)

 Image of OR gate

Image of or Gate

Image of OR gate

(B)

Image of Circuit Lamp (L Choice-3)

Image of Circuit Lamp (L Choice-3)

Image of Circuit Lamp (L Choice-3)

(ii)

Image of XOR gate

Image of XOR Gate

Image of XOR gate

(C)

Image of Circuit Lamp (L Choice-1)

Image of Circuit Lamp (L Choice-1)

Image of Circuit Lamp (L Choice-1)

(iii)

Image of NOR gate

Image of nor Gate

Image of NOR gate

(D)

Image of Circuit Lamp (L Choice-4)

Image of Circuit Lamp (L Choice-4)

Image of Circuit Lamp (L Choice-4)

(iv)

Image of NAND gate

Image of NAND Gate

Image of NAND gate

Choices

Choice (4) Response
  • (A)
  • (B)
  • (C)
  • (D)

a.

  • (i)
  • (iv)
  • (ii)
  • (iii)

b.

  • (iv)
  • (iii)
  • (i)
  • (ii)

c.

  • (i)
  • (iv)
  • (iii)
  • (ii)

d.

  • (ii)
  • (i)
  • (iii)
  • (iv)