Electronic Devices-Logic Gates (Or, and, NOT, NAND and NOR) (NEET Physics): Questions 6 - 8 of 17

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Question number: 6

» Electronic Devices » Logic Gates (Or, and, NOT, NAND and NOR)

Assertion-Reason▾

Assertion (Ꭺ)

De-morgen’s theorem Equation may be explained by the following circuit

Circuit Diagram for De-morgen’s theorem

Circuit Diagram for De-Morgen’S Theorem

Circuit diagram shows the De-morgen’s theorem.

Reason (Ꭱ)

In the following circuit, for output 1 inputs A, B, C are 1, 0, 1.

 Combination of two NAND gates

Combination of Two NAND Gates

In figure combination of two NAND gate circuit is shown.

Choices

Choice (4) Response

a.

Ꭺ is false but Ꭱ is true

b.

Both Ꭺ and Ꭱ are true but Ꭱ is NOT the correct explanation of Ꭺ

c.

Ꭺ is true but Ꭱ is false

d.

Both Ꭺ and Ꭱ are false

Question number: 7

» Electronic Devices » Logic Gates (Or, and, NOT, NAND and NOR)

MCQ▾

Question

Given below are four logic gates symbol (figure). Those for OR, NOR and NAND are respectively

Choices

Choice (4) Response

a.

Symbols of logic gate of OR, NOR, NAND and AND– Choice A

Symbols of Logic Gate of or, NOR, NAND and and– Choice A

In figure symbol of logic gate is shown

b.

Symbols of logic gate of OR, NOR, NAND and AND– Choice B

Symbols of Logic Gate of or, NOR, NAND and and– Choice B

In figure symbol of logic gate is shown

c.

Symbols of logic gate of OR, NOR, NAND and AND– Choice C

Symbols of Logic Gate of or, NOR, NAND and and– Choice C

In figure symbol of logic gate is shown

d.

Symbols of logic gate of OR, NOR, NAND and AND– Choice D

Symbols of Logic Gate of or, NOR, NAND and and– Choice D

In figure symbol of logic gate is shown

Question number: 8

» Electronic Devices » Logic Gates (Or, and, NOT, NAND and NOR)

MCQ▾

Question

The combination of gates shown below produces

Circuit diagram of the combination of 4 gates

Circuit Diagram of the Combination of 4 Gates

In figure combination of three NOT gates and a NOR gate is shown. A & B are inputs and Y is a output of this circuit.

Choices

Choice (4) Response

a.

NAND gate

b.

NOR gate

c.

XOR gate

d.

AND gate

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