GATE (Graduate Aptitude Test in Engineering) Instrumentation: Questions 50 - 53 of 85

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Question number: 50

» Digital Electronics » Sequential Circuits,Flip-Flops, Counters, Shift Registers

Appeared in Year: 2013

MCQ▾

Question

The digital circuit shown below uses two negative edge–triggered D–flip–flops. Assuming initial condition of and as zero, the output of this circuit is

The circuit consists of Dflipflop with negative edge-triggering

The Circuit Consists of Dflipflop With Negative Edge-Triggering

The circuit consists of two D flip-flop with negative edge-triggering

Choices

Choice (4) Response

a.

00,11,10,01,00…

b.

00,01,11,10,00….

c.

00,01,10,11,00…

d.

00,01,11,11,00…

Question number: 51

» Digital Electronics » Combinational Logic Circuits, Minimization of Boolean Functions

Appeared in Year: 2011

MCQ▾

Question

For the Boolean expression , the minimized Product of Sum (POS) expression is

Choices

Choice (4) Response

a.

b.

c.

d.

Question number: 52

» Digital Electronics » Comparators

Appeared in Year: 2013

MCQ▾

Question

In the circuit shown below what is the output voltage () in Volts if a silicon transistor Q and an ideal op-amp are used?

The circuit consisting an ideal OPAMPto find its output voltage

The Circuit Consisting an Ideal OPAMPto Find Its Output Voltage

The circuit consisting an ideal OPAMP to find its output voltage

Choices

Choice (4) Response

a.

(-0.7)

b.

(-15)

c.

15

d.

0.7

Question number: 53

» Digital Electronics » Comparators

Appeared in Year: 2014

MCQ▾

Question

For the op-amp shown in the figure, the bias currents are and. The values of the input bias current () and the input offset current () are:

An Operational amplifier with two inputs

An Operational Amplifier With Two Inputs

An Operational amplifier with two inputs

Choices

Choice (4) Response

a.

b.

c.

d.

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