Digital Circuits-Data Converters [GATE (Graduate Aptitude Test in Engineering) Electronics]: Questions 1 - 6 of 28
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Question 1
Appeared in Year: 2003
Question MCQ▾
The circuit shown in the figure is a 4 bit DAC
The input bits 0 and 1 are represented by 0 and 5 V respectively. The OP AMP is ideal, but all the resistance and the 5 v inputs have a tolerance of % 10. The specification (rounded to nearest multiple of 5 %) for the tolerance of the DAC is
Choices
Choice (4) | Response | |
---|---|---|
a. | % 35 | |
b. | % 5 | |
c. | % 10 | |
d. | % 20 |
Question 2
Appeared in Year: 2000
Question MCQ▾
For the 4 bit DAC shown in the figure, the output voltage is,
Choices
Choice (4) | Response | |
---|---|---|
a. | 10 V | |
b. | 5 V | |
c. | 4 V | |
d. | 8 V |
Passage
In the following circuit, the comparators output is logic “1” if and is logic “0” otherwise. The D/A conversion is done as per the relation,
Volts, where are the counter outputs. The counter starts from the clear state.
Question 3 (1 of 2 Based on Passage)
Appeared in Year: 2008
Question MCQ▾
The magnitude of the error between and at steady state in volts is
Choices
Choice (4) | Response | |
---|---|---|
a. | 0.3 | |
b. | 0.5 | |
c. | 0.2 | |
d. | 1.0 |
Question 4 (2 of 2 Based on Passage)
Appeared in Year: 2008
Question MCQ▾
The stable reading of the LED displays is
Choices
Choice (4) | Response | |
---|---|---|
a. | 06 | |
b. | 13 | |
c. | 12 | |
d. | 07 |
Question 5
Appeared in Year: 2000
Question MCQ▾
The number of comparators in a 4 bit flash ADC is
Choices
Choice (4) | Response | |
---|---|---|
a. | 5 | |
b. | 16 | |
c. | 15 | |
d. | 4 |
Question 6
Appeared in Year: 2001
Question MCQ▾
In the TTL circuit in the figure, S2 and S0 are select lines and X7 and X0 are input lines. S0 and X0 are LSBs. The output Y is,
Choices
Choice (4) | Response | |
---|---|---|
a. | ||
b. | ||
c. | ||
d. |