Digital Circuits [GATE (Graduate Aptitude Test in Engineering) Electronics]: Questions 247 - 251 of 271

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Question 247

Digital Circuits
Shift-Registers and Finite State Machines

Appeared in Year: 2015

Question

MCQ▾

A three-bit pseudo random number generator is shown. Initially the value of output is set to . The value of output Y after three clock cycles is

A Three-Bit Pseudo Random Number Generator is Shown

Choices

Choice (4)Response

a.

000

b.

c.

d.

Question 248

Digital Circuits
Programming

Appeared in Year: 2015

Question

MCQ▾

In an 8085 microprocessor, which one of the following instructions changes the content of the accumulator?

Choices

Choice (4)Response

a.

MOV B, M

b.

PCHL

c.

RNZ

d.

SBI BE H

Question 249

Digital Circuits
Shift-Registers and Finite State Machines

Appeared in Year: 2017

Question

Numeric Answer▾

bit shift register circuit configured for right-shift operation is is shown. If the present state of the shift register is , the number of clock cycles required to reach the state is …

The Number of Clock Cycles Required to Reach the State ABCD

Question 250

Digital Circuits
Boolean Algebra, Minimization of Functions

Appeared in Year: 2017

Question

MCQ▾

Which one of the following gives the simplified sum of products expression for the Boolean function , where are minterms corresponding to the inputs A, B, and C with A as the MSB and C as the LSB?

Choices

Choice (4)Response

a.

b.

c.

d.

Question 251

Digital Circuits
Logic Gates and Their Static CMOS Implementation

Appeared in Year: 2017

Question

MCQ▾

In the latch circuit shown, the NAND gates have non-zero, but unequal propagation delays. The present input condition is: , If the input condition is changed simultaneously to , the outputs X and Y are

The Latch Circuit Shown, the NAND Gates

Choices

Choice (4)Response

a.

b.

Either or

c.

Either or

d.

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