Digital Circuits [GATE (Graduate Aptitude Test in Engineering) Electronics]: Questions 241 - 246 of 271

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Question 241

Digital Circuits
Arithmetic Circuits, Code Converters, Multiplexers, Decoders and PLAs

Appeared in Year: 2017

Question

MCQ▾

A programmable logic array is shown in figure.

The Boolean Function F Implemented

The Boolean function F implemented is

Choices

Choice (4)Response

a.

b.

c.

d.

Question 242

Digital Circuits
Counters

Appeared in Year: 2015

Question

MCQ▾

The figure shows a binary counter with synchronous clear input. With the decoding logic shown, the counter works as a

Binary Counter

Choices

Choice (4)Response

a.

b.

c.

d.

Question 243

Digital Circuits
Shift-Registers and Finite State Machines

Appeared in Year: 2019

Question

Numeric Answer▾

In the circuit shown, the clock frequency, i.e.. , the frequency of the Clk signal, is 12 kHz. The frequency of the signal at is ________ kHz. (Carry One Mark Each)

The Clock Frequency

Question 244

Digital Circuits
Logic Gates and Their Static CMOS Implementation

Appeared in Year: 2016

Question

Numeric Answer▾

The minimum number of input NAND gates required to implement a input XOR gate is …

Question 245

Digital Circuits
Counters

Appeared in Year: 2015

Question

MCQ▾

The circuit shown consists of flip-flops, each with an active low asynchronous reset . The counter corresponding to this circuit is …

The Counter Corresponding to this Circuit

Choices

Choice (4)Response

a.

A binary up counter

b.

A binary down counter

c.

A binary up counter

d.

A binary down counter

Question 246

Digital Circuits
Memory and I-O Interfacing

Appeared in Year: 2017

Question

MCQ▾

In a DRAM,

Choices

Choice (4)Response

a.

Information is stored in a capacitor

b.

Periodic refreshing is not required

c.

Both read and write operations can be performed simultaneously

d.

Information is stored in a Latch

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