Digital Circuits [GATE (Graduate Aptitude Test in Engineering) Electronics]: Questions 204 - 206 of 271

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Question 204

Digital Circuits
Latches and Flip-Flops

Appeared in Year: 2014 (UGC-NET)

Question

MCQ▾

Which of the following statements are true regarding the operation of JK flip-flop? (June)

1. When K input is low and J input is high, the Q output of the flip flop is reset.

2. When K input is high and J input is low, the output Q of the flip flop is set.

3. When both the inputs K and J are low, the output Q does not change.

4. When both the inputs K and J are high it is possible to set or reset the flip-flop (i.e.) the output toggle on next positive clock edge.

Which one of the following is true?

Choices

Choice (4)Response

a.

1,2 and 3

b.

1 and 2

c.

3 and 4

d.

Question does not provide sufficient data or is vague

Question 205

Digital Circuits
Counters

Appeared in Year: 2013 (UGC-NET)

Question

Match List-Ⅰ List-Ⅱ▾

Match the following lists: (September)

List-Ⅰ (Type of Counters)List-Ⅱ (No. of Flip Flops Required)
(A)

Mod-11

(i)

4

(B)

Mod-6

(ii)

3

(C)

Mod-31

(iii)

5

Choices

Choice (4)Response
  • (A)
  • (B)
  • (C)

a.

  • (ii)
  • (i)
  • (iii)

b.

  • (iii)
  • (i)
  • (ii)

c.

  • (i)
  • (ii)
  • (iii)

d.

All of the above

Question 206

Digital Circuits
Architecture

Appeared in Year: 2014 (UGC-NET)

Question

Match List-Ⅰ List-Ⅱ▾

Match the following lists: (June)

List-Ⅰ (Column-I)List-Ⅱ (Column-II)
(A)

PC

(i)

used for storing address of the external memory

(B)

AC

(ii)

Contains the address of the instructions which has to be executed after completion of execution of present instruction.

(C)

HL

(iii)

Primary register to perform arithmetic and logical operations

(D)

SP

(iv)

Contains the data of stored from registers

Choices

Choice (4)Response
  • (A)
  • (B)
  • (C)
  • (D)

a.

  • (iii)
  • (ii)
  • (i)
  • (iv)

b.

  • (ii)
  • (i)
  • (iv)
  • (iii)

c.

  • (i)
  • (iv)
  • (ii)
  • (iii)

d.

  • (ii)
  • (iii)
  • (i)
  • (iv)

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