Digital Circuits [GATE (Graduate Aptitude Test in Engineering) Electronics]: Questions 102 - 105 of 271

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Question 102

Digital Circuits
Arithmetic Circuits, Code Converters, Multiplexers, Decoders and PLAs

Appeared in Year: 2007

Question

MCQ▾

In the following circuit, X is given by

The Combinational Circuit Consists of 4 to 1 Multiplexer

Choices

Choice (4)Response

a.

b.

c.

d.

Question 103

Digital Circuits
Latches and Flip-Flops

Appeared in Year: 2001

Question

MCQ▾

The digital block in the figure is realized using two positive edge triggered D-flip-flop. Assume that for , The circuit in the digital block is given

Figure Having a Digital Block with X as Input & Y as the Output

Choices

Choice (4)Response

a.

The Circuit Having Two D- Flip-Flops for: Choice A

b.

The Circuit Having Two D- Flip-Flops for: Choice B

c.

The Circuit Having Two D- Flip-Flops for: Choice C

d.

The Circuit Having Two D- Flip-Flops for: Choice D

Question 104

Digital Circuits
Latches and Flip-Flops

Appeared in Year: 2007

Question

MCQ▾

For the circuit shown, the counter state follows the sequence

The Combinational Circuit of D Flip-Flops

Choices

Choice (4)Response

a.

00, 01, 10,11, 00

b.

00, 10, 11,00, 10

c.

00, 01, 10,00, 01

d.

00, 01, 11,00, 01

Question 105

Digital Circuits
Logic Gates and Their Static CMOS Implementation

Appeared in Year: 2006

Question

MCQ▾

The number of product terms in the minimized sum-of-product expression obtained through the following K - map is (where, “d” denotes don՚t care states)

K-Map for Minimized Sum-Of-Product Expression
1001
0d00
00d1
1001

Choices

Choice (4)Response

a.

3

b.

4

c.

2

d.

5

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