# GATE (Graduate Aptitude Test in Engineering) Electronics: Questions 23 - 26 of 1076

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## Question 23

Boolean Algebra, Minimization of Functions

Appeared in Year: 1998

### Question

MCQ▾

Two 2՚s complement number having sign bits x and y are added And the sign bit of the result is z. Then, the occurrence of overflow is indicated by the Boolean function,

### Choices

Choice (4)Response

a.

b.

c.

d.

## Question 24

Appeared in Year: 2009

### Question

MCQ▾

Refer to the NAND and NOR latches shown in the figure. The inputs for both latches are first made (0,1) and then, after a few seconds, made (1,1) . The corresponding stable outputs are

### Choices

Choice (4)Response

a.

NAND: first (1,0) then (1,0) NOR: first (1,0) then (0,0)

b.

NAND: first (1,0) then (1,1) NOR: first (0,1) then (0,1)

c.

NAND: first (1,0) then (1,0) NOR: first (1,0) then (1,0)

d.

NAND: first (0,1) then (0,1) NOR: first (1,0) then (0,0)

## Question 25

Boolean Algebra, Minimization of Functions

Appeared in Year: 2005

### Question

MCQ▾

The Boolean expression for the truth table shown is

 A B C D 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 0

### Choices

Choice (4)Response

a.

b.

c.

d.

## Question 26

Logic Gates and Their Static CMOS Implementation

Appeared in Year: 2001

### Question

MCQ▾

The 2՚s complement representation of -17 is

### Choices

Choice (4)Response

a.

111110

b.

101110

c.

110001

d.

101111

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