GATE (Graduate Aptitude Test in Engineering) Electronics: Questions 1 - 4 of 1179
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Question 1
Appeared in Year: 1997
Question MCQ▾
Each cell of a static random access memory contains
Choices
| Choice (4) | Response | |
|---|---|---|
a. | 1 MOS transistors and 1 capacitors | |
b. | 6 MOS transistor | |
c. | 2 MOS transistors and 4 capacitors | |
d. | 4 MOS transistors and 2 capacitors | |
Question 2
Appeared in Year: 2003
Question MCQ▾
The circuit shown in the figure is a 4 bit DAC
The input bits 0 and 1 are represented by 0 and 5 V respectively. The OP AMP is ideal, but all the resistance and the 5 v inputs have a tolerance of % 10. The specification (rounded to nearest multiple of 5 %) for the tolerance of the DAC is
Choices
| Choice (4) | Response | |
|---|---|---|
a. | % 35 | |
b. | % 5 | |
c. | % 10 | |
d. | % 20 | |
Question 3
Appeared in Year: 2000
Question MCQ▾
For the 4 bit DAC shown in the figure, the output voltage is,
Choices
| Choice (4) | Response | |
|---|---|---|
a. | 10 V | |
b. | 5 V | |
c. | 4 V | |
d. | 8 V | |
Question 4
Appeared in Year: 2008
Question MCQ▾
For each of the positive edge-triggered J K flip - flop used in the following figure, the propagation delay is .
Which of the following wave forms correctly represents the output at
Choices
| Choice (4) | Response | |
|---|---|---|
a. |  | |
b. |  | |
c. |  | |
d. |  | |