GATE (Graduate Aptitude Test in Engineering) Computer Science: Questions 2032 - 2034 of 2080

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Question 2032

Appeared in Year: 2020

Question

MCQ▾

Consider the functions

I.

II.

III.

Which of the above functions is/are increasing everywhere in ?

Choices

Choice (4)Response

a.

I and III only

b.

III only

c.

II only

d.

II and III only

Question 2033

Appeared in Year: 2020

Question

True-False▾

Statements

  1. Daisy chaining is used to assign priorities in attending interrupts.

  2. When a device raises a vectored interrupt, the CPU does polling to identify the source of the interrupt.

  3. In polling, the CPU periodically checks the status bits to know if any device needs its attention.

  4. During DMA, both the CPU and DMA controller can be bus masters at the same time.

Choices

Choice (4)Response

a.

Both statement Ⅰ & statement Ⅱ are true.

b.

Both statement Ⅰ & statement Ⅲ are true.

c.

All the statements are correct.

d.

None of the statements is correct.

Question 2034

Edit

Appeared in Year: 2020

Question

Numeric Answer▾

Consider a non-pipelined processor operating at 2.5 GHz. It takes 5 clock cycles to complete an instruction. You are going to make a 5- stage pipeline out of this processor. Overheads associated with pipelining force you to operate the pipelined processor at 2 GHz. In a given program, assume that 30 % are memory instructions, 60 % are ALU instructions and the rest are branch instructions. 5 % of the memory instructions cause stalls of 50 clock cycles each due to cache misses and 50 % of the branch instructions cause stalls of 2 cycles each. Assume that there are no stalls associated with the execution of ALU instructions. For this program, the speedup achieved by the pipelined processor over the non-pipelined processor (round off to 2 decimal places) is ________.

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